make

Sun, 09 Oct 2016 20:23:01 +0000

A small make orientation guide.

make is a versatile task runner, its core competency is in creating files from other files

Make essentials
C specifics
- Custom variables
- Implicit variables
Example Makefiles

Make essentials

make generates files from other files, using recipes, the syntax is as follows. Please note, thanks to POSIX standardisation the recipe MUST be indented with a tab (not spaces):

target_file: prerequisite_file1 prerequisite_file2
	shell command to build target_file (MUST be indented with tabs, not spaces)
	another shell command (these commands are called the "recipe")

Unless you specify otherwise, Make assumes that the target (target_file above) and prerequisites (prerequisite_file1 and prerequisite_file2) are actual files or directories. You can ask Make to build a target from the command line like this:

Make on Benny Simmonds

make

Make essentials